1. Field of the Invention
The present invention relates to a solid-state image sensing element and image sensing system and, more particularly, to a solid-state image sensing element which includes column A/D conversion circuits that perform analog-to-digital conversion of pixel signals from two-dimensionally arranged pixels by column, and an image sensing system using the solid-state image sensing element.
2. Description of the Related Art
In recent years, X-Y addressing type solid-state image sensing elements, such as a CMOS sensors, have emerged which includes circuits that perform analog-to-digital conversion (to be referred to as A/D conversion hereinafter) by column. Such solid-state image sensing element converts analog signals from pixels into digital signals in an early stage of a signal path, thereby preventing noise from superimposing on signals, and improving an S/N. Also, A/D conversion processing can be executed in a column parallel manner, thus speeding up signal readout processing.
A plurality of types of column A/D conversion circuits have been proposed in terms of circuit scales, processing speeds, resolutions, and the like. One of these types is a single-slope integration type A/D conversion circuit which compares a pixel signal and a reference voltage that changes in the form of a ramp wave shape depending on counts, and acquires a count value upon completion of the comparison processing as a digital signal (Japanese Patent Laid-Open No. 62-154981). As a characteristic feature of the single-slope integration type A/D conversion circuit, since an A/D conversion circuit can be configured in a simple arrangement, an increase in circuit scale can be avoided even when circuits are arranged in parallel.
Japanese Patent Laid-Open No. 62-154981 above does not consider any noise generated by a comparison circuit included in the A/D conversion circuit. Although a relatively low conversion rate is required since A/D conversion is performed in a column-parallel manner, the comparison circuit actually requires a frequency band of several hundred MHz so as to meet readout the requirements for speed-up and multiple tones. In general, a wideband circuit suffers large noise. This is because such circuits undesirably transmit noise components distributed over a broad frequency band.
In case of a comparison circuit having a frequency band of several hundred MHz, when a circuit is actually designed, noise may have a magnitude as large as several hundred μV. For example, in case of a 12-bit A/D conversion circuit having an input range of 1 V, since the quantization error is 1 V/4096=244 μV, noise caused by the comparison circuit (to be referred to as circuit noise hereinafter) has a magnitude that cannot be ignored compared to the quantization error. In this case, even if the A/D conversion resolution is raised any further, circuit noise becomes dominant, and lower bits include only noise components. Therefore, a practical resolution as determined by the S/N ratio is as low as about 12 bits. In particular, when incoming light is weak, that is, when the signal output level is low, circuit noise imposes a relatively serious influence, thus requiring measures to be taken against it. On the other hand, when incoming light is strong, since light-shot noise becomes dominant, the influence of circuit noise is relatively small. In this case, the comparison circuit is required to meet other requirements such as speed-up rather than low-noise requirements. Therefore, it is difficult for the conventional arrangement to attain noise reduction while maintaining high A/D conversion speed.